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19-0746; Rev 1; 7/07
KIT ATION EVALU ABLE AVAIL
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
General Description
The MAX9775/MAX9776 combine a high-efficiency Class D, stereo/mono audio power amplifier with a mono DirectDriveTM receiver amplifier and a stereo DirectDrive headphone amplifier. Maxim's 3rd-generation, ultra-low-EMI, Class D audio power amplifiers provide Class AB performance with Class D efficiency. The MAX9775/MAX9776 deliver 1.5W per channel into a 4 load from a 5V supply and offer efficiencies up to 79%. Active emissions limiting circuitry and spread-spectrum modulation greatly reduce EMI, eliminating the need for output filtering found in traditional Class D devices. The MAX9775/MAX9776 utilize a fully differential architecture, a full-bridged output, and comprehensive clickand-pop suppression. A 3D stereo enhancement function allows the MAX9775 to widen the stereo sound field immersing the listener in a cleaner, richer sound experience than typically found in portable applications. The devices utilize a flexible, user-defined mixer architecture that includes an input mixer, volume control, and output mixer. All control is done through I2C. The mono receiver amplifier and stereo headphone amplifier use Maxim's patented DirectDrive architecture that produces a ground-referenced output from a single supply, eliminating the need for large DC-blocking capacitors, saving cost, space, and component height. The MAX9775/MAX9776 are available in a 32-pin TQFN (5mm x 5mm) or a 32-bump UCSPTM (3mm x 3mm) package and specified over the extended -40C to +85C temperature range.
Features
o Unique Spread-Spectrum Modulation and Active Emissions Limiting Significantly Reduces EMI o 3D Stereo Enhancement (MAX9775 Only) o Up to 3 Stereo Inputs o 1.5W Stereo Speaker Output (4, VDD = 5V) o 50mW Mono Receiver/Stereo Headphone Outputs (32, VDD = 3.3V) o High PSRR (68dB at 217Hz) o 79% Efficiency (VDD = 3.3V, RL = 8, POUT = 470mW) o I2C Control--Input Configuration, Volume Control, Output Mode o Click-and-Pop Suppression o Low Total Harmonic Distortion (0.03% at 1kHz) o Current-Limit and Thermal Protection
MAX9775/MAX9776
Ordering Information
PART MAX9775ETJ+* MAX9775EBX+T* MAX9776ETJ+ MAX9776EBX+T PINPACKAGE 32 TQFN-EP** 32 UCSP-32 32 TQFN-EP** 32 UCSP-32 PKG CODE T3255-4 B36-4 T3255-4 B36-4 CLASS D AMPLIFIER Stereo Stereo Mono Mono
Applications
Cell Phones Portable Multimedia Players Handheld Gaming Consoles
U.S. Patent# 7,061,327
Note: All devices are specified over the -40C to +85C operating temperature range. +Denotes lead-free package. *Future product--contact factory for availability. **EP = Exposed pad. Pin Configurations appear at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc.
Simplified Block Diagrams
SINGLE SUPPLY 2.7V TO 5.5V SINGLE SUPPLY 2.7V TO 5.5V
GAIN CONTROL
3D SOUND CONTROL MIXER/ MUX
GAIN CONTROL
MIXER/ MUX
I2 C INTERFACE
I 2C INTERFACE
MAX9775
MAX9776
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
ABSOLUTE MAXIMUM RATINGS
VDD to GND..............................................................................6V PVDD to PGND .........................................................................6V CPVDD to CPGND ....................................................................6V CPVSS to CPGND .....................................................-6V to +0.3V VSS to CPGND..........................................................-6V to +0.3V C1N .......................................(CPVSS - 0.3V) to (CPGND + 0.3V) C1P.......................................(CPGND - 0.3V) to (CPVDD + 0.3V) HPL, HPR to GND...................(CPVSS - 0.3V) to (CPVDD + 0.3V) GND to PGND and CPGND................................................0.3V VDD to PVDD and CPVDD ....................................................0.3V SDA, SCL to GND.....................................................-0.3V to +6V All other pins to GND..................................-0.3V to (VDD + 0.3V) Continuous Current In/Out of PVDD, PGND, CPVDD, CPGND, OUT__, HPR, and HPL..................................................800mA Continuous Input Current CPVSS ......................................260mA Continuous Input Current (all other pins) .........................20mA Duration of Short Circuit Between OUT_+ and OUT_- ..................................................Continuous Duration of HP_, OUT_ Short Circuit to GND or PVDD ..........................................................Continuous Continuous Power Dissipation (TA = +70C) 32-Bump (3mm x 3mm) UCSP Multilayer Board (derate 17.0mW/C above +70C) ...........................1360.5mW 32-Pin (5mm x 5mm) TQFN Single-Layer Board (derate 21.3mW/C above +70C) ...........................1702.1mW 32-Pin TQFN Multilayer Board (derate 34.5mW/C above +70C)...........................................................2758.6mW Junction Temperature ......................................................+150C Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1F. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER GENERAL Supply Voltage Range VDD, PVDD, Inferred from PSRR test CPVDD Output mode 1, 6, 11 (Rx mode) Quiescent Current (Mono) IDD Output mode 4, 9, 14 (HP mode) Output mode 2, 7, 12 (SP mode) Output mode 3, 8, 13 (SP and HP mode) Output mode 1, 6, 11 (Rx mode) Quiescent Current (Stereo) IDD Output mode 4, 9, 14 (HP mode) Output mode 2, 7, 12 (SP mode) Output mode 3, 8, 13 (SP and HP mode) Mute Current Shutdown Current IMUTE ISHDN Current in mute (low power) Hard shutdown Soft shutdown SHDN = GND See the I2C Interface section 2.7 6.3 8 9.5 12.9 7 9 16.5 20 4.7 0.1 8.5 30 17.5 3.5 45 1.12 28 5.5 50 1.25 41.0 8.0 60 1.38 10 10 15 A mA mA 5.5 10 12.6 15 18 mA V SYMBOL CONDITIONS MIN TYP MAX UNITS
Turn-On Time
tON
Time from shutdown or power-on to full operation B and C pair inputs, TA = +25C, VOL = max A pair inputs, TA = +25C, +20dB TA = +25C, fIN = 1kHz (Note 2) IN_ inputs
ms k k dB V
Input Resistance Common-Mode Rejection Ratio Input DC Bias Voltage
RIN CMRR VBIAS
2
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1F. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SPEAKER AMPLIFIERS Output Offset Voltage VOS TA = +25C TMIN TA TMAX Peak voltage, TA = +25C, A-weighted, 32 samples per second (Notes 2, 3) Into shutdown Out of shutdown Into mute Out of mute VDD = 2.7V to 5.5V f = 217Hz, 100mVP-P ripple Power-Supply Rejection Ratio (Note 3) PSRR TA = +25C f = 1kHz, 100mVP-P ripple f = 20kHz, 100mVP-P ripple Output Power (Note 4) Current Limit Total Harmonic Distortion Plus Noise (Note 4) RL = 8, POUT = 125mW RL = 4, POUT = 250mW BW = 20Hz to 20kHz A-weighted POUT THD+N = 1%, TA = +25C RL = 4, VDD = 5V RL = 8, VDD = 3.3V RL = 8, VDD = 5V 48 -62 -60 -63 -62 70 68 60 50 1500 450 1115 1.6 0.03 % 0.04 81 dB 84 1100 1100 30 79 12 TA = +25C R3D Used with 22nF and 2.2nF external capacitors L to R, R to L, f = 10kHz, RL = 8, VOUT = 300mVRMS 5 1 7 73 9 kHz % dB % k dB A mW dB dB 5.5 23.5 40 mV SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX9775/MAX9776
Click-and-Pop Level
KCP
THD+N
f = 1kHz
Signal-to-Noise Ratio
SNR
VOUT = 1.8VRMS, RL = 8, 3D not active (Note 3)
Output Frequency Efficiency Gain Channel-to-Channel Gain Tracking (Note 5) 3D Sound Resistors (Note 5) Crosstalk (Notes 4, 5)
fOSC AV
Fixed-frequency modulation Spread-spectrum modulation POUT = 470mW, f = 1kHz both channels driven, L = 68H in series with 8 load
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3
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1F. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER RECEIVER AMPLIFIER Output Offset Voltage VOS TA = +25C Peak voltage, TA = +25C, A-weighted, 32 samples per second (Notes 3, 6) Into shutdown Into mute Out of shutdown Out of mute VDD = 2.7V to 5.5V f = 217Hz, 100mVP-P ripple Power-Supply Rejection Ratio (Note 3) PSRR TA = +25C f = 1kHz, 100mVP-P ripple f = 20kHz, 100mVP-P ripple Output Power Gain Total Harmonic Distortion Plus Noise Signal-to-Noise Ratio Slew Rate Capacitive Drive HEADPHONE AMPLIFIERS Output Offset Voltage VOS TA = +25C Peak voltage, TA = +25C, A-weighted, 32 samples per second (Notes 2, 4) HP_ Into shutdown Into mute Out of shutdown Out of mute Contact Air VDD = 2.7V to 5.5V f = 217Hz, 100mVP-P ripple Power-Supply Rejection Ratio (Note 3) PSRR TA = +25C f = 1kHz, 100mVP-P ripple f = 20kHz, 100mVP-P ripple 58 1.8 -61 -65 -60 -64 4 8 80 80 70 62 dB kV dB 5.5 mV POUT AV THD+N SNR SR CL RL = 16 (VOUT = 800mVRMS, f = 1kHz) RL = 32 (VOUT = 800mVRMS, f = 1kHz) RL = 16, VOUT = 800mVRMS (Note 3) BW = 20Hz to 20kHz A-weighted TA = +25C, THD+N = 1% RL = 16 RL = 32 58 1.8 -62 -67 -63 -66 80 80 70 62 60 50 3 0.03 0.024 87 89 0.3 300 mW dB % dB V/s pF dB dB 5.5 mV SYMBOL CONDITIONS MIN TYP MAX UNITS
Click-and-Pop Level
KCP
Click-and-Pop Level
KCP
ESD Protection
4
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1F. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Output Power Current Limit Gain Channel-to-Channel Gain Tracking Total Harmonic Distortion Plus Noise Signal-to-Noise Ratio Slew Rate Capacitive Drive Crosstalk VOLUME CONTROL HP gain (max) IN+6dB = 0 (minimum gain setting) Volume Control IN+6dB = 1 (maximum gain setting) SP gain (max) HP gain (min) SP gain (min) HP gain (max) SP gain (max) HP gain (min) SP gain (min) Mono+6dB = 0 Mono Gain All outputs Mono+6dB = 1 Input Pair A Control Mute Attenuation (Minimum Volume) DIGITAL INPUTS (SHDN, SDA, SCL) Input-Voltage High Input-Voltage Low Input Hysteresis (SDA, SCL) VIH VIL VHYS 200 1.4 0.4 V V mV INA+20dB = 0 (minimum gain setting) INA+20dB = 1 (maximum gain setting) VIN = 1VRMS 6 Set by IN+6dB 20 80 dB dB 3 12 -72 -63 9 18 -61 -57 0 dB dB THD+N AV TA = +25C RL = 16 (VOUT = 800mVRMS, f = 1kHz) RL = 32 (VOUT = 800mVRMS, f = 1kHz) RL = 16, VOUT = 800mVRMS BW = 20Hz to 20kHz A-weighted SYMBOL POUT TA = +25C, THD+N = 1% CONDITIONS RL = 16 RL = 32 MIN TYP 60 50 170 +3 1 0.03 0.024 92 93 0.3 300 L to R, R to L, f = 10kHz, RL = 16, VOUT = 160mVRMS 75 V/s pF dB MAX UNITS mW mA dB % %
MAX9775/MAX9776
SNR SR CL
dB
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5
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1F. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SDA, SCL Input Capacitance Input Leakage Current Pulse Width of Spike Suppressed DIGITAL OUTPUTS (SDA Open Drain) Output Low Voltage SDA Output Fall Time SDA I2C INTERFACE TIMING Serial Clock Frequency Bus Free Time Between STOP and START Conditions START Condition Hold STOP Condition Setup Time Clock Low Period Clock High Period Data Setup Time Data Hold Time Maximum Receive SCL/SDA Rise Time Maximum Receive SCL/SDA Fall Time Setup Time for STOP Condition Capacitive Load for Each Bus Line fSCL tBUF tHD:STA tSU:STA tLOW tHIGH tSU:DAT tHD:DAT tR tF tSU:STO Cb 0.6 400 DC 1.3 0.6 0.6 1.3 0.6 100 0 900 300 300 400 kHz s s s s s ns ns ns ns s pF VOL tOF ISINK = 6mA VH(MIN) to VL(MAX) bus capacitance = 10pF to 400pF, ISINK = 3mA 250 0.4 V ns SYMBOL CIN IIN tSP CONDITIONS MIN TYP 10 0.3 50 5.0 MAX UNITS pF A ns
Note 1: Note 2: Note 3: Note 4:
All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design. Measured at headphone outputs. Amplifier inputs AC-coupled to GND. Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL = 8, L = 68H; for RL = 4, L = 47H. Note 5: MAX9775 only. Note 6: Testing performed at room temperature with an 8 resistive load in series with a 68H inductive load connected across BTL outputs for speaker amplifier. Testing performed with a 32 resistive load connected between OUT_ and GND for headphone amplifier. Testing performed with 32 resistive load connected between OUTRx and GND for mono receiver amplifier. Mode transitions are controlled by I2C.
6
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Typical Operating Characteristics
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc01
MAX9775/MAX9776
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc02
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
VDD = 3.3V RL = 4 POUT = 400mW
MAX9775/76 toc03
1 VDD = 5V RL = 4
1 VDD = 5V RL = 8 POUT = 150mW
1
0.1 THD+N (%)
POUT = 400mW THD+N (%)
0.1
0.1 THD+N (%)
0.01
POUT = 1000mW
0.01
POUT = 750mW
0.01
POUT = 150mW
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc04
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc05
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 5V RL = 4 10
MAX9775/76 toc06
1
VDD = 3.3V RL = 8 POUT = 300mW
1 VDD = 3.3V RL = 8 POUT = 500mW 0.1 THD+N (%) SSM
100
THD+N (%)
0.1 THD+N (%)
1 f = 10kHz 0.1 f = 1kHz 0.01 f = 20Hz
0.01
POUT = 150mW
0.01
FFM
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 0 0.4 0.8 1.2 1.6 2.0 OUTPUT POWER (W)
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7
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9775/76 toc07
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9775/76 toc08
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 3.3V RL = 8 10
MAX9775/76 toc09
100 VDD = 5V RL = 8 10 f = 1kHz THD+N (%)
100 VDD = 3.3V RL = 4 10 f = 1kHz
100 f = 1kHz
THD+N (%)
1 f = 10kHz 0.1
1 f = 10kHz 0.1
THD+N (%)
1 f = 10kHz
0.1
0.01
f = 20Hz
0.01
f = 20Hz
0.01
f = 20Hz
0.001 0 0.3 0.6 0.9 1.2 1.5 OUTPUT POWER (W)
0.001 0 0.2 0.4 OUTPUT POWER (W) 0.6 0.8
0.001 0 0.2 0.4 0.6 OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 5V RL = 8 f = 1kHz
MAX9775/76 toc10
EFFICIENCY vs. OUTPUT POWER
MAX9775/76 toc11
EFFICIENCY vs. OUTPUT POWER
90 80 EFFICIENCY (%) 70 60 50 40 30 RL = 4 RL = 8
MAX9775/76 toc12
100
100 90 80 EFFICIENCY (%) 70 60 50 40 30 RL = 4 RL = 8
100
10
THD+N (%)
1 SSM 0.1
0.01
FFM
20 10
VDD = 5V fIN = 1kHz POUT = POUTL + POUTR 0 0.8 1.6 2.4 3.2 4.0
20 10 0 0 0.4 0.8
VDD = 3.3V fIN = 1kHz POUT = POUTL + POUTR 1.2 1.6 2.0
0.001 0 0.3 0.6 0.9 1.2 1.5 OUTPUT POWER (W)
0 OUTPUT POWER (W)
OUTPUT POWER (W)
8
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9775/76 toc13
MAX9775/MAX9776
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9775/76 toc14
OUTPUT POWER vs. LOAD
VDD = 5V f = 1kHz 2.0 OUTPUT POWER (W) THD+N = 10% 1.5
MAX9775/76 toc15
2200 2000 1800 OUTPUT POWER (mW) 1600 1400 1200 1000 800 600 400 200 0 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) THD+N = 1% THD+N = 10% RL = 4 f = 1kHz
1600 1400 OUTPUT POWER (mW) 1200 1000 800 600 400 THD+N = 1% RL = 8 f = 1kHz THD+N = 10%
2.5
1.0 THD+N = 1% 0.5
200 0 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) 0 1 10 LOAD () 100
OUTPUT POWER vs. LOAD
MAX9775/76 toc16
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
MAX9775/76 toc17
CROSSTALK vs. FREQUENCY
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 10 CROSSTALK (dB) OUT_ = 1VP-P RL = 8
MAX9775/6 toc18
1000
800 OUTPUT POWER (W) THD+N = 10% 600
POWER-SUPPLY REJECTION RATIO (dB)
VDD = 3.3V f = 1kHz
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 10
VDD = 3.3V VIN = 100mVP-P RL = 8 OUTR
RIGHT TO LEFT
400 THD+N = 1% 200
OUTL
LEFT TO RIGHT
0 1 10 LOAD () 100
100
1k FREQUENCY (Hz)
10k
100k
100
1k 10k FREQUENCY (Hz)
100k
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
CROSSTALK vs. INPUT AMPLITUDE
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 0 0.1
MAX9775/6 toc19
IN-BAND OUTPUT SPECTRUM
MAX9775/76 toc20
IN-BAND OUTPUT SPECTRUM
0 OUTPUT MAGNITUDE (dBV) -20 -40 -60 -80 -100 -120 -140 FFM MODE RL = 8 VDD = 3.3V fIN = 1kHz UNWEIGHTED
MAX9775/76 toc21
20 0 OUTPUT MAGNITUDE (dBV) -20 -40 -60 -80 -100 -120 -140 0 5k 10k FREQUENCY (Hz) 15k SSM MODE RL = 8 VDD = 3.3V fIN = 1kHz UNWEIGHTED
20
fIN = 1kHz RL = 8 GAIN = +12dB
CROSSTALK (dB)
RIGHT TO LEFT
LEFT TO RIGHT 0.2 0.3 0.4 0.5 INPUT AMPLITUDE (VRMS) 0.6
20k
0
5k
10k FREQUENCY (Hz)
15k
20k
WIDEBAND OUTPUT SPECTRUM FIXED-FREQUENCY MODE
MAX9775/6 toc22
WIDEBAND OUTPUT SPECTRUM SPREAD-SPECTRUM MODE
MAX9775 toc23
MAX9775 SUPPLY CURRENT vs. SUPPLY VOLTAGE
SP MODE INPUTS AC GROUNDED OUTPUTS UNLOADED SUPPLY CURRENT (mA) 20
MAX9775/76 toc24
20 0 OUTPUT MAGNITUDE (dBV) -20 -40 -60 -80 -100 -120 -140 0.1 1 10 100 FREQUENCY (MHz) VDD = 5V RL = 8 INPUTS AC GROUNDED
20 0 OUTPUT MAGNITUDE (dBV) -20 -40 -60 -80 -100 -120 -140 VDD = 5V RL = 8 INPUTS AC GROUNDED
25
15
10 0.1 1 10 100 FREQUENCY (MHz) 1000 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V)
1000
10
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
MAX9776 SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9775/76 toc25
MAX9775/MAX9776
SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9775/76 toc26
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
VDD = 5V RL = 32
MAX9775/76 toc27
16 14 SUPPLY CURRENT (mA) 12 10 8 6 4 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) SP MODE INPUTS AC GROUNDED OUTPUTS UNLOADED
100 90 80 SUPPLY CURRENT (nA) 70 60 50 40 30 20 10 0 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V)
1
0.1 THD+N (%) POUT = 20mW 0.01 POUT = 40mW 0.001 10 100 1k FREQUENCY (Hz) 10k 100k
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc28
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9775/76 toc29
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 5V RL = 32 10 f = 1kHz THD+N (%)
MAX9775/76 toc30
1 VDD = 3.3V RL = 16
1 VDD = 3.3V RL = 32
100
0.1 THD+N (%) THD+N (%) POUT = 40mW
0.1 POUT = 40mW 1
f = 10kHz 0.1
0.01 POUT = 20mW
0.01 POUT = 10mW 0.001 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k 0.01 f = 20Hz
0.001
0.001 0 20 40 60 80 OUTPUT POWER (mW)
______________________________________________________________________________________
11
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9775 toc31
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 3.3V RL = 32 10 f = 1kHz
MAX9775/76 toc32
TOTAL HARMONIC DISTORTION PLUS NOISE vs. COMMON-MODE VOLTAGE
VDD = 3.3V fIN = 1kHz POUT = 30mW GAIN = +3dB RL = 32
MAX9775/6 toc33
100 VDD = 3.3V RL = 16 10 f = 1kHz f = 10kHz
100
100
10
THD+N (%)
f = 10kHz 0.1
0.1
THD+N (%)
1
THD+N (%)
1
1
0.1
0.01 f = 20Hz 0.001 0 30 60 90 OUTPUT POWER (mW) 120
0.01 f = 20Hz 0.001 0 20 40 60 80 OUTPUT POWER (mW)
0.01
0.001 0 0.5 1.0 1.5 2.0 COMMON-MODE VOLTAGE (V) 2.5
POWER DISSIPATION vs. OUTPUT POWER
MAX9775/76 toc34
POWER DISSIPATION vs. OUTPUT POWER
MAX9775/76 toc35
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9775/76 toc36
500 450 POWER DISSIPATION (mW) 400 350 300 250 200 150 100 50 0 0 40 80 VDD = 5V f = 1kHz RL = 32 POUT = POUTR + POUTL
500 450 POWER DISSIPATION (mW) 400 350 300 250 200 150 100 50 0 RL = 32 VDD = 3.3V f = 1kHz POUT = POUTR + POUTL 0 40 80 120 RL = 16
65 60 THD+N = 10% OUTPUT POWER (mW) 55 50 45 40 35 30 RL = 32 f = 1kHz 2.7 3.2 3.7 4.2 4.7 5.2 THD+N = 1%
120
160
TOTAL OUTPUT POWER (mW)
TOTAL OUTPUT POWER (mW)
SUPPLY VOLTAGE (V)
12
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
OUTPUT POWER vs. LOAD
MAX9775/76 toc37
MAX9775/MAX9776
OUTPUT POWER vs. LOAD
MAX9775/76 toc38
OUTPUT POWER vs. LOAD RESISTANCE AND CHARGE-PUMP CAPACITOR SIZE
VDD = 3.3V f = 1kHz THD+N = 1% C1 = C2 = 2.2F 60 C1 = C2 = 1F
MAX9775/6 toc39
200 180 160 OUTPUT POWER (mW) 140 120 100 80 60 40 20 0 10 100 LOAD () THD+N = 1% VDD = 5V f = 1kHz THD+N = 10%
200 180 160 OUTPUT POWER (mW) 140 120 100 80 60 40 20 0 THD+N = 1% THD+N = 10% VDD = 3.3V f = 1kHz
100
80 OUTPUT POWER (mW)
40
20 C1 = C2 = 0.68F 0 10 100 LOAD () 1000 10 100 LOAD () 1000
1000
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
MAX9775/6 toc40
OUTPUT FREQUENCY SPECTRUM
MAX9775/76 toc41
CROSSTALK vs. FREQUENCY
OUT_ = 1VP-P RL = 32
MAX9775/6 toc42
0 POWER-SUPPLY REJECTION RATIO (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k 10k FREQUENCY (Hz) HPL HPR VDD = 3.3V VIN = 100mVP-P RL = 32
20 0 OUTPUT MAGNITUDE (dBV) -20 -40 -60 -80 -100 -120 -140 0 5k 10k FREQUENCY (Hz) 15k VDD = 3.3V f = 1kHz RL = 32
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120
CROSSTALK (dB)
RIGHT TO LEFT
LEFT TO RIGHT 10 100 1k 10k FREQUENCY (Hz) 100k
100k
20k
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13
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain = INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1F. TA = +25C, unless otherwise noted.)
CROSSTALK vs. INPUT AMPLITUDE
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 0 CROSSTALK (dB)
MAX9775 toc43
TURN-ON RESPONSE
MAX9775/76 toc44
TURN-OFF RESPONSE
MAX9775/76 toc45
fIN = 1kHz RL = 32 GAIN = +3dB
SCL 2V/div
SCL 2V/div
RIGHT TO LEFT
SPEAKER OUTPUT 50mA/div HEADPHONE OUTPUT 2V/div 1.2 10ms/div 10ms/div
SPEAKER OUTPUT 50mA/div HEADPHONE OUTPUT 2V/div
LEFT TO RIGHT 0.4 0.8 INPUT AMPLITUDE (VRMS)
MUTE-ON RESPONSE
MAX9775/76 toc46
MUTE-OFF RESPONSE
MAX9775/76 toc47
SCL 2V/div
SCL 2V/div
SPEAKER OUTPUT 50mA/div HEADPHONE OUTPUT 2V/div 10ms/div 10ms/div
SPEAKER OUTPUT 50mA/div
HEADPHONE OUTPUT 2V/div
14
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Pin Description--MAX9775
PIN TQFN 1 2 3 4, 29 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 32 EP UCSP F1 E1 D2 D1, F3 C1 C2 B1 B2 A1 A2 B3 A3 A4 B4 A5 A6 B5 B6 C5 C6 D6 D5 E6 E5 F6 F5 E4 F4 E3 F2 E2 -- NAME PVDD OUTLSCL PGND OUTL+ SDA CL_L CL_H CPVDD C1P VBIAS CPGND C1N INC1 CPVSS HPL VSS HPR INC2 OUTRx VDD INB2 CR_L INB1 GND CR_H INA2 OUTR+ INA1 OUTRSHDN EP Class D Power Supply Negative Left-Speaker Output Serial Clock Input. Connect a 1k pullup resistor from SCL to VDD. Power Ground Positive Left-Speaker Output Serial Data Input. Connect a 1k pullup resistor from SDA to VDD. 3D External Capacitor 3. Connect a 22nF capacitor to GND. 3D External Capacitor 4. Connect a 22nF capacitor to GND. Charge-Pump Power Supply Charge-Pump Flying Capacitor Positive Terminal Common-Mode Bias Charge-Pump GND Charge-Pump Flying Capacitor Negative Terminal Input C1. Left input or positive input (see Table 5a). Charge-Pump Output. Connect to VSS. Left Headphone Output Headphone Amplifier Negative Power Supply. Connect to CPVSS. Right Headphone Output Input C2. Right input or negative input (see Table 5a). Mono Receiver Output Analog Power Supply Input B2. Right input or negative input (see Table 5a). 3D External Capacitor 1. Connect a 22nF capacitor to GND. Input B1. Left input or positive input (see Table 5a). Analog Ground 3D External Capacitor 2. Connect a 22nF capacitor to GND. Input A2. Right input or negative input (see Table 5a). Positive Right Speaker Output Input A1. Left input or positive input (see Table 5a). Negative Right Speaker Output Active-Low Hardware Shutdown Exposed Pad. The external pad lowers the package's thermal impedance by providing a direct heat conduction path from the die to the PCB. The exposed pad is internally connected to GND. Connect the exposed thermal pad to the GND plane. FUNCTION
MAX9775/MAX9776
______________________________________________________________________________________
15
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Pin Description--MAX9776
PIN TQFN 1 2 3 4, 29 5 6 7, 8, 23, 26, 28, 31 9 10 11 12 13 14 15 16 17 18 19 20 21 22 24 25 27 30 32 EP UCSP F1 E1 D2 D1, F3 C1 C2 B1, B2, E6, F2, F4, F5 A1 A2 B3 A3 A4 B4 A5 A6 B5 B6 C5 C6 D6 D5 E5 F6 E4 E3 E2 -- NAME PVDD OUTSCL PGND OUT+ SDA I.C. CPVDD C1P VBIAS CPGND C1N INC1 CPVSS HPL VSS HPR INC2 OUTRx VDD INB2 INB1 GND INA2 INA1 SHDN EP Class D Power Supply Negative Left-Speaker Output Serial Clock Input. Connect a 1k pullup resistor from SCL to VDD. Power Ground Positive Left-Speaker Output Serial Data Input. Connect a 1k pullup resistor from SDA to VDD. Internal Connection. Leave unconnected. This pin is internally connected to the signal path. Do not connect together or to any other pin. Charge-Pump Power Supply Charge-Pump Flying Capacitor Positive Terminal Common-Mode Bias Charge-Pump GND Charge-Pump Flying Capacitor Negative Terminal Input C1. Left input or positive input (see Table 5a). Charge-Pump Output. Connect to VSS. Left Headphone Output Headphone Amplifier Negative Power Supply. Connect to CPVSS. Right Headphone Output Input C2. Right input or negative input (see Table 5a). Mono Receiver Output Analog Power Supply Input B2. Right input or negative input (see Table 5a). Input B1. Left input or positive input (see Table 5a). Analog Ground Input A2. Right input or negative input (see Table 5a). Input A1. Left input or positive input (see Table 5a). Active-Low Hardware Shutdown Exposed Pad. The external pad lowers the package's thermal impedance by providing a direct heat conduction path from the die to the PCB. The exposed pad is internally connected to GND. Connect the exposed thermal pad to the GND plane. FUNCTION
16
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Typical Application Circuits
VDD VDD
MAX9775/MAX9776
C2 1F CPVSS 15 (A5) C1N 13 (A4) C1 1F VDD CPGND 12 (A3) C1P 10 (A2) CPVDD 9 (A1) C3 1F 1F INA1 30 (E3) INA2 27 (E4) 1F 1F INB1 24 (E5) INB2 22 (D5) 1F 1F INC1 14 (B4) INC2 19 (C5) 1F VBIAS 1F 6 (C2) 11 (B3) INPUT C: 0dB OR 6dB INPUT B: 0dB OR 6dB INPUT MIXER MONO VOLUME INPUT A: 0dB, 6dB, OR 20dB LEFT VOLUME RIGHT VOLUME CHARGE PUMP VSS 17 (B5) VDD 21 (D6)
1F PVDD 1 (F1)
0.1F
1F
DirectDrive 3dB 16 (A6) HPL
3dB
18 (B6) HPR
3dB OUTPUT MIXER 12dB
20 (C6) OUTRx
5 (C1) OUTL+ CLASS D AMPLIFIER MAXIM 3D SOUND 12dB 28 (F4) OUTR+ CLASS D AMPLIFIER 31 (F2) OUTR2 (E1) OUTL-
SDA SCL SHDN
MAX9775
3 (D2) 32 (E2) I2C CONTROL 3D CIRCUIT
25 (F6) GND
4 (D1) PGND
29 (F3) PGND
23 (E6) CR_L 2.2nF
26 (F5) CR_H 22nF
7 (B1) CL_L 2.2nF
8 (B2) CL_H 22nF
______________________________________________________________________________________
17
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Typical Application Circuits (continued)
VDD VDD
C2 1F CPVSS 15 (A5) C1N 13 (A4) C1 1F VDD CPGND 12 (A3) C1P 10 (A2) CPVDD 9 (A1) C3 1F 1F INA1 30 (E3) INA2 27 (E4) 1F 1F INB1 24 (E5) INB2 22 (D5) 1F 1F INC1 14 (B4) INC2 19 (C5) 1F VBIAS 1F 6 (C2) 11 (B3) INPUT C: 0dB OR 6dB INPUT B: 0dB OR 6dB INPUT MIXER MONO VOLUME INPUT A: 0dB, 6dB, OR 20dB LEFT VOLUME RIGHT VOLUME CHARGE PUMP VSS 17 (B5) VDD 21 (D6)
1F PVDD 1 (F1)
0.1F
1F
DirectDrive 3dB 16 (A6) HPL
3dB
18 (B6) HPR
OUTPUT MIXER
3dB
20 (C6) OUTRx
12dB 5 (C1) OUT+ CLASS D AMPLIFIER 2 (E1) OUT-
SDA SCL SHDN
MAX9776
3 (D2) 32 (E2) I2C CONTROL
25 (F6) GND
4 (D1) PGND
29 (F3) PGND
18
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Detailed Description
The MAX9775/MAX9776 ultra-low-EMI, filterless, Class D audio power amplifiers feature several improvements to switch-mode amplifier technology. The MAX9775/ MAX9776 feature active emissions limiting circuitry to reduce EMI. Zero dead-time technology maintains stateof-the-art efficiency and THD+N performance by allowing the output FETs to switch simultaneously without crossconduction. A unique filterless modulation scheme and spread-spectrum modulation create compact, flexible, low-noise, efficient audio power amplifiers while occupying minimal board space. The differential input architecture reduces common-mode noise pickup with or without the use of input-coupling capacitors. The MAX9775/MAX9776 can also be configured as singleended input amplifiers without performance degradation. The MAX9775/MAX9776 feature three fully differential input pairs (INA_, INB_, INC_) that can be configured as stereo single-ended or mono differential inputs. I2C provides control for input configuration, volume level, and mixer configuration. The MAX9775's 3D enhancement feature widens the stereo sound field to improve stereo imaging when stereo speakers are placed in close proximity.
tSW VIN-
DirectDrive allows the headphone and mono receiver amplifiers to output ground-referenced signals from a single supply, eliminating the need for large DC-blocking capacitors. Comprehensive click-and-pop suppression minimizes audible transients during the turn-on and turn-off of amplifiers.
MAX9775/MAX9776
Class D Speaker Amplifier
Comparators monitor the audio inputs and compare the complementary input voltages to a sawtooth waveform. The comparators trip when the input magnitude of the sawtooth exceeds their corresponding input voltage. The active emissions limiting circuitry slightly reduces the turn-on rate of the output H-bridge by slew-rate limiting the comparator output pulse. Both comparators reset at a fixed time after the rising edge of the second comparator trip point, generating a minimum-width pulse (tON(MIN),100ns typ) at the output of the second comparator (Figure 1). As the input voltage increases or decreases, the duration of the pulse at one output increases while the other output pulse duration remains the same. This causes the net voltage across the speaker (VOUT+ - VOUT-) to change. The minimum-width pulse helps the devices to achieve high levels of linearity.
VIN+
OUT-
OUT+
tON(MIN)
VOUT+ - VOUT-
Figure 1. Outputs with an Input Signal Applied
______________________________________________________________________________________ 19
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Operating Modes
Fixed-Frequency Modulation The MAX9775/MAX9776 feature a fixed-frequency modulation mode with a 1.1MHz switching frequency, set through the I2C interface (Table 2). In fixed-frequency modulation mode, the frequency spectrum of the Class D output consists of the fundamental switching frequency and its associated harmonics (see the Wideband Output Spectrum Fixed-Frequency Mode graph in the Typical Operating Characteristics). Spread-Spectrum Modulation The MAX9775/MAX9776 feature a unique, patented spread-spectrum modulation that flattens the wideband spectral components. Proprietary techniques ensure that
the cycle-to-cycle variation of the switching period does not degrade audio reproduction or efficiency (see the Typical Operating Characteristics). Select spread-spectrum modulation mode through the I2C interface (Table 2). In spread-spectrum modulation mode, the switching frequency varies randomly by 30kHz around the center frequency (1.16MHz). The modulation scheme remains the same, but the period of the sawtooth waveform changes from cycle to cycle (Figure 2). Instead of a large amount of spectral energy present at multiples of the switching frequency, the energy is now spread over a bandwidth that increases with frequency. Above a few megahertz, the wideband spectrum looks like white noise for EMI purposes (see Figure 3).
tSW
tSW
tSW
tSW
VIN-
VIN+
OUT-
OUT+
tON(MIN)
VOUT+ - VOUT-
Figure 2. Output with an Input Signal Applied (Spread-Spectrum Modulation Mode)
20
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
40.0 35.0 EN55022B LIMIT 30.0 AMPLITUDE (dBV/m) 25.0 20.0 15.0 10.0 5.0 30.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0 220.0 240.0 260.0 280.0 300.0 FREQUENCY (MHz)
Figure 3. EMI with 76mm of Speaker Cable
______________________________________________________________________________________
21
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Filterless Modulation/Common-Mode Idle
The MAX9775/MAX9776 use Maxim's unique, patented modulation scheme that eliminates the LC filter required by traditional Class D amplifiers, improving efficiency, reducing component count, conserving board space and system cost. Conventional Class D amplifiers output a 50% duty-cycle square wave when no signal is present. With no filter, the square wave appears across the load as a DC voltage, resulting in finite load current, increasing power consumption, especially when idling. When no signal is present at the input of the MAX9775/MAX9776, the outputs switch as shown in Figure 4. Because the MAX9775/MAX9776 drive the speaker differentially, the two outputs cancel each other, resulting in no net idle mode voltage across the speaker, minimizing power consumption.
VIN = 0V
OUT-
OUT+
DirectDrive
Traditional single-supply headphone amplifiers have outputs biased at a nominal DC voltage (typically half the supply) for maximum dynamic range. Large coupling capacitors are needed to block this DC bias from the headphone. Without these capacitors, a significant amount of DC current flows to the headphone, resulting in unnecessary power dissipation and possible damage to both headphone and headphone amplifier. Maxim's patented DirectDrive architecture uses a charge pump to create an internal negative supply voltage. This allows the headphone outputs of the MAX9775/MAX9776 to be biased at GND, almost doubling dynamic range while operating from a single supply. With no DC component, there is no need for the large DC-blocking capacitors. Instead of two large (220F, typ) tantalum capacitors, the MAX9775/MAX9776 charge pump requires two small ceramic capacitors, conserving board space, reducing cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Load Resistance and Charge-Pump Capacitor Size graph in the Typical Operating Characteristics for details of the possible capacitor sizes. There is a low DC voltage on the amplifier outputs due to amplifier offset. However, the offset of the MAX9775/MAX9776 is typically 1.4mV, which, when combined with a 32 load, results in less than 44nA of DC current flow to the headphones.
VOUT+ - VOUT- = 0V
Figure 4. Outputs with No Input Signal
In addition to the cost and size disadvantages of the DC-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the amplifier's low-frequency response and can distort the audio signal. Previous attempts at eliminating the output-coupling capacitors involved biasing the headphone return (sleeve) to the DC bias voltage of the headphone amplifiers. This method raises some issues: 1) The sleeve is typically grounded to the chassis. Using the midrail biasing approach, the sleeve must be isolated from system ground, complicating product design. 2) During an ESD strike, the driver's ESD structures are the only path to system ground. Thus, the amplifier must be able to withstand the full ESD strike. 3) When using the headphone jack as a lineout to other equipment, the bias voltage on the sleeve may conflict with the ground potential from other equipment, resulting in possible damage to the amplifiers.
22
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
VDD RIGHT QR
+ IL VOUT VDD / 2 IR + d
RIGHT LISTENER LEFT
GND
LEFT
QL
CONVENTIONAL DRIVER-BIASING SCHEME
Figure 6. MAX9775 3D Stereo Enhancement
+VDD
VOUT
GND
-VDD
With Maxim's 3D stereo enhancement, it is possible to emulate stereo sound in situations where the speakers must be positioned close together. As shown in Figure 6, wave interference can be used to cancel the left channel in the vicinity of the listener's right ear and vice versa. This technique can yield an apparent separation between the speakers that is a factor of four or greater than the actual physical separation. The external capacitors CL_L, CL_H, CR_L, and CR_H set the starting and stopping range of the 3D effect. CL_H and CR_H are for the lower limit (in the MAX9775 Typical Application Circuit, it is 1kHz), CR_L and CL_L are for the higher limit (10kHz). The internal resistor is typically 7k and the frequencies are calculated as: 3D _ START = 1 2RC
DirectDrive BIASING SCHEME
Figure 5. Traditional Amplifier Output vs. MAX9775/MAX9776 DirectDrive Output
Charge Pump The MAX9775/MAX9776 feature a low-noise charge pump. The switching frequency of the charge pump is half the switching frequency of the Class D amplifier, regardless of the operating mode. The nominal switching frequency is well beyond the audio range, and thus does not interfere with the audio signals, resulting in an SNR of 93dB. Although not typically required, additional high-frequency noise attenuation can be achieved by increasing the size of C2 (see the Typical Application Circuits). The charge pump is active in both speaker and headphone modes.
where R = 7k and C = CR_H and CL_H. 3D _ STOP = 1 2RC
where R = 7k and C = CR_L and CL_L. For example, with CR_L = CL_L = 2.2nF and CR_H = CL_H = 22nF, the 3D start frequency is 1kHz and the 3D stop frequency is 10kHz. Enabling the 3D sound effect results in an apparent 6dB gain because the internal left and right signals are mixed together. This gain can be nulled by volume adjusting the left and right signals. The volume control can be programmed through the I2C-compatible interface to compensate for the extra 6dB increase in gain. For example,
3D Enhancement
The MAX9775 features a 3D stereo enhancement function, allowing the MAX9775 to widen the stereo sound field and immerse the listener in a cleaner, richer sound experience. Note the MAX9776, mono Class D speaker amplifier does not feature 3D stereo enhancement. As stereo speaker applications become more compact, the quality of stereophonic sound is jeopardized.
______________________________________________________________________________________
23
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
if the right and left volume controls are set for a maximum gain 0dB (11111 in Table 7, IN+6dB = 0 from Table 10) before the 3D effect is activated, the volume control should be programmed to -6dB (11001 in Table 7) immediately after the 3D effect has been activated. in the Input Mixer to create the internal signals L, R, and M. In the second stage of amplification, the internal L, R, and M signals are independently volume adjusted. Finally, each output amplifier has its own internal gain. The speaker, headphone, and mono receiver amplifiers have fixed gains of 12dB, 3dB, and 3dB, respectively.
Signal Path
The audio inputs of the MAX9775/MAX9776--INA, INB, and INC--are preamplified and then mixed by the input mixer to create three internal signals: Left (L), Right (R), and Mono (M). Tables 5a and 5b show how the inputs are mixed to create L, R, and M. These signals are then independently volume adjusted by the L, R, and M volume control and routed to the output mixer. The output mixer mixes the internal L, R, and M signals to create a variety of audio mixes that are output to the headphone speaker and mono receiver amplifiers. Figure 6 shows the signal path that the audio signals take. Signal amplification takes place in three stages. In the first stage, the inputs (INA, INB, and INC) are preamplified. The amount by which each input is amplified is determined by the bits INA+20dB (B4 in the Input Mode Control Register) and IN+6dB (B3 in the Global Control Register). After preamplification, they are mixed
Current-Limit and Thermal Protection
The MAX9775/MAX9776 feature current limiting and thermal protection to protect the device from short circuits and overcurrent conditions. The headphone amplifier pulses in the event of an overcurrent condition with a pulse every 100s as long as the condition is present. Should the current still be high, the above cycle is repeated. The speaker amplifier current-limit protection clamps the output current without shutting down the output. This can result in a distorted output. Current is limited to 1.6A in the speaker amplifiers and 170mA in the headphone and mono receiver amplifiers. The MAX9775/MAX9776 have thermal protection that disables the device at +150C until the temperature decreases to +120C.
-75dB TO 0dB
12dB SPEAKER
RVOL PREAMPLIFIER INPUT INPUT A: 0dB, 6dB, 20dB INPUT B AND C: 0dB, 6dB MONO MONO+6dB MVOL INPUT MIXER LVOL 0dB TO 6dB -75dB TO 0dB 3dB RECEIVER -75dB TO 0dB OUTPUT MIXER 3dB HEADPHONE
Figure 7. Signal Path
24
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers, the output-coupling capacitor is a major contributor of audible clicks and pops. Upon startup, the amplifier charges the coupling capacitor to its bias voltage, typically half the supply. Likewise, during shutdown, the capacitor is discharged to GND. This results in a DC shift across the capacitor, which, in turn, appears as an audible transient at the speaker. Since the MAX9775/MAX9776 headphone amplifier does not require output-coupling capacitors, this problem does not arise. In most applications, the output of the preamplifier driving the MAX9775/MAX9776 has a DC bias of typically half the supply. During startup, the input-coupling capacitor is charged to the preamplifier's DC bias voltage, resulting in a DC shift across the capacitor and an audible click/pop. An internal delay of 30ms eliminates the click/pop caused by the input filter.
Shutdown
The MAX9775/MAX9776 feature a 0.1A hard shutdown mode that reduces power consumption to extend battery life and a soft shutdown where current consumption is typically 8.5A. Hard shutdown is controlled by connecting the SHDN pin to GND, disabling the amplifiers, bias circuitry, charge pump, and I2C. In shutdown, the headphone amplifier output impedance is 1.4k and the speaker output impedance is 300k. Similarly, the MAX9775/MAX9776 enter soft-shutdown when the SHDN bit = 0 (see Table 2). The I2C interface is active and the contents of the command register are not affected when in soft-shutdown. This allows the master to write to the MAX9775/MAX9776 while in shutdown. The I2C interface is completely disabled in hardware shutdown. When the MAX9775/MAX9776 are re-enabled the default settings are applied (see Table 3).
I2C Interface The MAX9775/MAX9776 feature an I2C 2-wire serial interface consisting of a serial data line (SDA) and a serial clock line (SCL). SDA and SCL facilitate communication between the MAX9775/MAX9776 and the master at clock rates up to 400kHz. Figure 8 shows the 2-wire interface timing diagram. The MAX9775/ MAX9776 are receive-only slave devices relying on the master to generate the SCL signal. The master, typically a microcontroller, generates SCL and initiates data transfer on the bus. The MAX9775/MAX9776 cannot write to the SDA bus except to acknowledge the receipt of data from the master. The MAX9775/MAX9776 will not acknowledge a read command from the master. A master device communicates to the MAX9775/ MAX9776 by transmitting the proper address followed by the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse.
The MAX9775/MAX9776 SDA line operates as both an input and an open-drain output. A pullup resistor, greater than 500, is required on the SDA bus. The MAX9775/MAX9776 SCL line operates as an input only. A pullup resistor (greater than 500) is required on SCL if there are multiple masters on the bus or if the master in a single-master system has an open-drain SCL output. Series resistors in line with SDA and SCL are optional. Series resistors protect the digital inputs of the MAX9775/MAX9776 from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals.
MAX9775/MAX9776
SDA tSU, DAT tLOW SCL tHD, STA tR START CONDITION tHIGH tF REPEATED START CONDITION STOP CONDITION START CONDITION tHD, DAT tSU, STA tBUF tHD, STA tSP tSU, STO
Figure 8. 2-Wire Serial-Interface Timing Diagram
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section). SDA and SCL idle high when the I2C bus is not busy. START and STOP Conditions A master device initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 9). A START (S) condition from the master signals the beginning of a transmission to the MAX9775/MAX9776. The master terminates transmission, and frees the bus, by issuing a STOP (P) condition. The bus remains active if a REPEATED START (Sr) condition is generated instead of a STOP condition. Early STOP Conditions The MAX9775/MAX9776 recognize a STOP condition at any point during data transmission except if the STOP condition occurs in the same high pulse as a START condition. Slave Address The MAX9775/MAX9776 are available with one preset slave address (see Table 1). The address is defined as
the seven most significant bits (MSBs) followed by the Read/Write bit. The address is the first byte of information sent to the MAX9775/MAX9776 after the START condition. The MAX9775/MAX9776 are slave devices only capable of being written to. The Read/Write bit should be a zero when configuring the MAX9775/ MAX9776.
Acknowledge The acknowledge bit (ACK) is a clocked 9th bit that the MAX9775/MAX9776 use to handshake receipt of each byte of data (see Figure 10). The MAX9775/MAX9776 pull down SDA during the master-generated 9th clock pulse. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master may reattempt communications.
Table 1. MAX9775/MAX9776 Address Map
PART MAX9775 MAX9776 SLAVE ADDRESS A6 1 1 A5 0 0 A4 0 0 A3 1 1 A2 1 1 A1 0 0 A0 0 1 R/W 0 0
S
Sr
P
START CONDITION SCL 1 2
CLOCK PULSE FOR ACKNOWLEDGMENT
SCL
8 NOT ACKNOWLEDGE
9
SDA
SDA ACKNOWLEDGE
Figure 9. START, STOP, and REPEATED START Conditions
Figure 10. Acknowledge
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION ACKNOWLEDGE FROM MAX9775/MAX9776 S SLAVE ADDRESS R/W B7 B6 B5 B4 B3 B2 B1 B0
0 ACK COMMAND BYTE ACKNOWLEDGE FROM MAX9775/MAX9776
ACK P
The MAX9775/MAX9776 only accept write data, but they acknowledge the receipt of the address byte with the R/W bit set high. The MAX9775/MAX9776 do not write to the SDA bus in the event that the R/W bit is set high. Subsequently, the master reads all 1's from the MAX9775/MAX9776. Always set the R/W bit to zero to avoid this situation.
MAX9775/MAX9776
Programming the MAX9775/MAX9776
Figure 11. Write Data Format Example
Write Data Format A write to the MAX9775/MAX9776 includes transmission of a START condition, the slave address with the R/W bit set to 0 (Table 1), one byte of data to configure the Command Register, and a STOP condition. Figure 11 illustrates the proper format for one frame.
The MAX9775/MAX9776 are programmed through 6 control registers. Each register is addressed by the 3 MSBs (B5-B7) followed by 5 configure bits (B0-B4) as shown in Table 2. Correct programming of the MAX9775/MAX9776 requires writing to all 6 control registers. Upon power-on, their default settings are as listed in Table 3.
Table 2. Control Registers
FUNCTION Input Mode Control Mono Volume Control Left Volume Control Right Volume Control Output Mode Control Global Control Register B7 0 0 0 0 1 1 B6 COMMAND 0 0 1 1 0 0 0 1 0 1 0 1 MONO+6dB SHDN IN+6dB INA+20dB B5 B4 B3 B2 DATA INMODE (Tables 5a and 5b) MVOL (Table 7) LVOL (Table 7) RVOL (Table 7) OUTMODE (Table 9) MUTE SSM 3D/MONO B1 B0
Table 3. Power-On Reset Conditions
COMMAND Input Mode (000) Mono Volume (001) Left Volume (010) Right Volume (011) Output Mode (100) Global Control Register (101) DATA 10000 11111 11111 11111 01000 00011 Maximum volume Maximum volume Maximum volume 0dB of extra mono gain, mode 8: stereo headphone, stereo speaker Powered-off, input B/C gain = 0dB, MUTE off, SSM on, 3D/MONO on DESCRIPTION Input A gain = +20dB; input A, B, and C singled-ended stereo inputs
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Input Mode Control
Table 4. Input Mode Control Register
REGISTER Input Mode Control B7 0 B6 0 B5 0 B4 INA+20dB B3 B2 B1 B0 INMODE (Tables 5a and 5b )
The MAX9775/MAX9776 have three flexible inputs that can be configured as single-ended stereo inputs or differential mono inputs. All input signals are summed into three unique signals--Left (L), Right (R), and Mono (M)--which are routed to the output amplifiers. The bit INA+20dB allows the option of boosting low-level signals on INA. INA+20dB can be set as follows:
1 = Input A's gain +20dB for low-level signals such as FM receivers. 0 = Input A's gain is either 0dB or +6dB as set by IN+6dB (bit B3 of the Control Register). Tables 5a and 5b show how the inputs--INA, INB, and INC--are mixed to create the internal signals Left (L), Right (R), and Mono (M).
Table 5a. Input Mode
PROGRAMMING MODE INMODE B2 B1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 INPUT CONFIGURATION B0 0 1 0 1 0 1 0 1 0 1 0 1 INA1 L L L L L L M+ M+ M+ M+ M+ M+ INA2 R R R R R R MMMMMMINB1 L L M+ M+ R+ L+ L L M+ M+ R+ L+ INB2 R R MMRLR R MMRLINC1 L M+ L M+ L+ R+ L M+ L M+ L+ R+ INC2 R MR MLRR MR MLR-
B3 0 0 0 0 0 0 0 0 1 1 1 1
Table 5b. Internal Signals L, R, and M
PROGRAMMING MODE INMODE B3 B2 B1 B0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 0 1 INTERNAL SIGNALS LEFT (L), RIGHT (R), AND MONO (M) L INA1 + INB1 + INC1 INA1 + INB1 INA1 + INC1 INA1 INA1 + (INC1 - INC2) INA1 + (INB1 - INB2) INB1 + INC1 INB1 INC1 -- INC1 - INC2 INB1 - INB2 R INA2 + INB2 + INC2 INA2 + INB2 INA2 + INC2 INA2 INA2 + (INB1 - INB2) INA2 + (INC1 - INC2) INB2 + INC2 INB2 INC2 -- INB1 - INB2 INC1 - INC2 M -- INC1 - INC2 INB1 - INB2 (INB1 - INB2) + (INC1 - INC2) -- -- INA1 - INA2 (INA1 - INA2) + (INC1 - INC2) (INA1 - INA2) + (INB1 - INB2) (INA1 - INA2) + (INB1 - INB2) + (INC1 - INC2) INA1 - INA2 INA1 - INA2
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Mono/Left/Right Volume Control
MAX9775/MAX9776
Table 6. Mono/Left/Right Volume Control Registers
REGISTER Mono Volume Control Left Volume Control Right Volume Control B7 0 0 0 B6 0 1 1 B5 1 0 1 B4 B3 B2 MVOL LVOL RVOL B1 B0
The MAX9775/MAX9776 have separate volume controls for each of the internal signals: Left (L), Right (R), and Mono (M). The final gain of each signal is determined by the way the following bits are set: MVOL, LVOL,
RVOL, INA+20dB, IN+6dB, and MONO+6dB. Table 7 shows how to configure the L, R, and M amplifiers for specific gains.
Table 7. Volume Control Settings
MVOL/LVOL/RVOL B4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 GAIN (dB) Mute -75 -71 -67 -63 -59 -55 -51 -47 -44 -41 -38 -35 -32 -29 -26 MVOL/LVOL/RVOL B4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 GAIN (dB) -23 -21 -19 -17 -15 -13 -11 -9 -7 -6 -5 -4 -3 -2 -1 0
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Output Mode Control
Table 8. Output Mode Control Register
REGISTER Output Mode Control B7 1 B6 0 B5 0 B4 MONO+6dB B3 B2 B1 B0 OUTMODE (Table 9)
MONO+6dB in the Output Mode Control register allows an extra 6dB of gain on the internal mono signal: 1 = Additional 6dB of gain is applied to the internal Mono (M) signal path. 0 = No additional gain is applied to the Internal Mono (M) signal path. The MAX9775 has five output amplifiers: a mono receiver amplifier, a stereo DirectDrive headphone
amplifier, and a stereo Class D amplifier. The MAX9776 has four output amplifiers: a mono receiver amplifier, a stereo DirectDrive headphone amplifier, and a mono Class D amplifier. Table 9 shows how each of the three internal signals-- Left (L), Right (R), and Mono (M)--are mixed and routed to the various outputs.
Table 9. Output Modes
MODE 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTMODE B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 RECEIVER -- M -- -- -- -- L+R -- -- -- -- M+L+R -- -- -- MUTE LEFT HP -- -- -- M M -- -- -- L L -- -- -- L+M L+M MUTE RIGHT HP -- -- -- M M -- -- -- R R -- -- -- R+M R+M MUTE MAX9775 LEFT SPK -- -- M M -- -- -- L L -- -- -- L+M L+M -- MUTE RIGHT SPK -- -- M M -- -- -- R R -- -- -- R+M R+M -- MUTE MAX9776 SPK -- -- M M -- -- -- L+R L+R -- -- -- L+R+M L+R+M -- MUTE
-- = Amplifier off. L = Left signal. R = Right signal. M = Mono signal.
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Global Control Register
MAX9775/MAX9776
Table 10. Global Control Register
REGISTER Global Control Register B7 1 B6 0 B5 1 B4 SHDN B3 IN+6dB B2 MUTE B1 SSM B0 3D/MONO
The Global Control Register is used for global configurations, those affecting all inputs and outputs. The bits
in the control register are shown in Table 11.
Table 11. Global Control Register Configurations
BIT B4 NAME SHDN FUNCTION 1 = Normal operation 0 = Low-power shutdown mode. I2C settings are saved. 1 = All input signals are boosted by 6dB. 0 = All input signals are passed un-amplified. This bit does not affect INA if the INA+20dB bit (B4 of the Input Mode Control Register) is set to 1, in which case INA is boosted by 20dB. 1 = Mute all outputs. 0 = All outputs are active. 1 = Spread-spectrum Class D modulation. 0 = Fixed-frequency Class D modulation. MAX9775: 1 = 3D Enhancement is on. 0 = 3D Enhancement is off. 1 = Speakers will output L+R in modes 7, 8, 12, and 13 (see Table 9). 0 = Speakers will output L in modes 7, 8, 12, and 13 (see Table 9).
B3
IN+6dB
B2 B1
MUTE SSM
B0
3D/MONO
Applications Information
Class D Filterless Operation
Traditional Class D amplifiers require an output filter to recover the audio signal from the amplifier's PWM output. The filters add cost, increase the solution size of the amplifier, and can decrease efficiency. The traditional PWM scheme uses large differential output swings (2 x VDD(P-P)) and causes large ripple currents. Any parasitic resistance in the filter components results in a loss of power, lowering the efficiency. The MAX9775/MAX9776 do not require an output filter. The device relies on the inherent inductance of the speaker coil and the natural filtering of both the speaker and the human ear to recover the audio component of the square-wave output. Eliminating the output filter results in a smaller, less costly, more efficient solution. Because the switching frequency of the MAX9775/ MAX9776 speaker output is well beyond the bandwidth
of most speakers, voice coil movement due to the square-wave frequency is very small. Although this movement is small, a speaker not designed to handle the additional power may be damaged. For optimum results use a speaker with a series inductance > 10H. Typical 8 speakers, for portable audio applications, exhibit series inductances in the 20H to 100H range.
Input Amplifier
Differential Input The MAX9775/MAX9776 feature a programmable differential input structure, making it compatible with many CODECs, and offering improved noise immunity over a single-ended input amplifier. In devices such as cell phones, high-frequency signals from the RF transmitter can be picked up by the amplifier's input traces. The signals appear at the amplifier's inputs as commonmode noise. A differential input amplifier amplifies the difference of the two inputs and any signal common to both is cancelled.
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Single-Ended Input The MAX9775/MAX9776 can be configured as a singleended input amplifier by appropriately configuring the Input Control Register (see Tables 5a and 5b). DC-Coupled Input The input amplifier can accept DC-coupled inputs that are biased to the amplifier's bias voltage. DC-coupling eliminates the input-coupling capacitors; reducing component count to potentially six external components (see the Typical Application Circuits). However, the highpass filtering effect of the capacitors is lost, allowing low-frequency signals to feed through to the load. Unused Inputs Connect any unused input pin directly to VBIAS. This saves input capacitors on unused inputs and provides the highest noise immunity on the input.
cally 300Hz to 3.5kHz). In addition, speakers used in portable devices typically have a poor response below 300Hz. Taking these two factors into consideration, the input filter may not need to be designed for a 20Hz to 20kHz response, saving both board space and cost due to the use of smaller capacitors.
Component Selection
Input Filter An input capacitor (CIN) in conjunction with the input impedance of the MAX9775/MAX9776 form a highpass filter that removes the DC bias from the incoming signal. The AC-coupling capacitor allows the amplifiers to automatically bias the signal to an optimum DC level. Assuming zero source impedance, the -3dB point of the highpass filter is given by:
f-3dB = 1 2RINCIN
Class D Output Filter The MAX9775/MAX9776 do not require a Class D output filter. The devices pass EN55022B emission standards with 152mm of unshielded speaker cables. However, output filtering can be used if a design is failing radiated emissions due to board layout or cable length, or the circuit is near EMI-sensitive devices. Use a ferrite bead filter when radiated frequencies above 10MHz are of concern. Use an LC filter when radiated frequencies below 10MHz are of concern, or when long leads (> 152mm) connect the amplifier to the speaker. Figure 12 shows optional speaker amplifier output filters.
External Component Selection
BIAS Capacitor VBIAS is the output of the internally generated DC bias voltage. The VBIAS bypass capacitor, CVBIAS improves PSRR and THD+N by reducing power supply and other noise sources at the common-mode bias node, and also generates the clickless/popless, startup/shutdown DC bias waveforms for the speaker amplifiers. Bypass VBIAS with a 1F capacitor to GND.
Choose CIN so that f-3dB is well below the lowest frequency of interest. Use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Other considerations when designing the input filter include the constraints of the overall system and the actual frequency band of interest. Although high-fidelity audio calls for a flat-gain response between 20Hz and 20kHz, portable voice-reproduction devices such as cell phones and two-way radios need only concentrate on the frequency range of the spoken human voice (typi-
22
0.1F 33H OUT_+ 0.47F OUT_33H 0.1F 22
0.033F
0.033F
Figure 12. Speaker Amplifier Output Filter
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Charge-Pump Capacitor Selection Use capacitors with an ESR less than 100m for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most surface-mount ceramic capacitors satisfy the ESR requirement. For best performance over the extended temperature range, select capacitors with an X7R dielectric or better. Table 12 lists suggested manufacturers. Flying Capacitor (C1) The value of the flying capacitor (C1) affects the output resistance of the charge pump. A C1 value that is too small degrades the device's ability to provide sufficient current drive, which leads to a loss of output voltage. Increasing the value of C1 reduces the charge-pump output resistance to an extent. Above 1F, the on-resistance of the switches and the ESR of C1 and C2 dominate. Output Capacitor (C2) The output capacitor value and ESR directly affect the ripple at CPVSS. Increasing the value of C2 reduces output ripple. Likewise, decreasing the ESR of C2 reduces both ripple and output resistance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Load Resistance and Charge-Pump Capacitor Size graph in the Typical Operating Characteristics. CPVDD Bypass Capacitor (C3) The CPVDD bypass capacitor (C3) lowers the output impedance of the power supply and reduces the impact of the MAX9775/MAX9776's charge-pump switching transients. Bypass CPVDD with C3 to PGND and place it physically close to the CPVDD and PGND. Use a value for C3 that is equal to C1.
traces that carry switching transients away from GND and the traces/components in the audio signal path. Connect all of the power-supply inputs (CPVDD, VDD, and PVDD) together. Bypass CPVDD with a 1F capacitor to CPGND. Bypass VDD with 1F capacitor to GND. Bypass PVDD with a 1F capacitor in parallel with a 0.1F capacitor to PGND. Place the bypass capacitors as close to the MAX9775/MAX9776 as possible. Place a bulk capacitor between PVDD and PGND if needed. Use large, low-resistance output traces. Current drawn from the outputs increases as load impedance decreases. High output trace resistance decreases the power delivered to the load. Large output, supply, and GND traces also allow more heat to move from the MAX9775/MAX9776 to the PCB, decreasing the thermal impedance of the circuit.
MAX9775/MAX9776
TQFN Applications Information
The MAX9775/MAX9776 TQFN-EP package features an exposed thermal pad on its underside. This pad lowers the package's thermal impedance by providing a direct heat conduction path from the die to the PCB. The exposed pad is internally connected to GND. Connect the exposed thermal pad to the PCB GND plane.
UCSP Applications Information
For the latest application details on UCSP construction, dimensions, tape carrier information, PCB techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information of reliability testing results, refer to Application Note: UCSP--A Wafer-Level Chip-Scale Package available on Maxim's website at www.maxim-ic.com/ucsp.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum performance. Use large traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Large traces also aid in moving heat away from the package. Proper grounding improves audio performance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. Connect PGND and GND together at a single point on the PCB. Route all
UCSP Thermal Consideration When operating at maximum output power, the UCSP thermal dissipation can become a limiting factor. The UCSP package does not dissipate as much power as a TQFN and as a result will operate at a higher temperature. At peak output power into a 4 load, the MAX9775/MAX9776 can exceed its thermal limit, triggering thermal protection. As a result, do not choose the UCSP package when maximum output power into 4 is required.
Table 12. Suggested Capacitor Manufacturers
SUPPLIER Taiyo Yuden TDK PHONE 800-348-2496 807-803-6100 FAX 847-925-0899 847-390-4405 WEBSITE www.t-yuden.com www.component.tdk.com
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Pin Configurations
TOP VIEW
OUTR+ OUTRSHDN SHDN PGND CR_H PGND INA1 INA2 INA1 INA2 GND GND 25 24 INB1 23 I.C. *EP 22 INB2 21 VDD 20 OUTRx 19 INC2 18 HPR 17 VSS 9 CPVDD 10 C1P 11 VBIAS 12 CPGND 13 C1N 14 INC1 15 CPVSS 5 16 HPL 6 HPL HPR OUTRx VDD I.C. GND I.C. I.C. I.C. 26 VSS INB1 I.C.
32 PVDD OUTLSCL PGND OUTL+ SDA CL_L CL_H 1 2 3 4 5 6 7 8 9 CPVDD
31
30
29
28
27
26
25 24 INB1 PVDD OUTSCL PGND OUT+ SDA I.C. I.C. 1 2 3 4 5 6 7 8
32
31
30
29
28
27
+
23 CR_L *EP 22 INB2 21 VDD
+
MAX9775
20 OUTRx 19 INC2 18 HPR 17 VSS
MAX9776
10 C1P
11 VBIAS
12 CPGND
13 C1N
14 INC1
15 CPVSS
16 HPL
32 TQFN-EP*
TOP VIEW (BUMPS ON BOTTOM)
1 2 3 4 5 6 1 2
32 TQFN-EP*
3
4
CPVDD A CL_L B OUTL+ C PGND D OUTLE PVDD F
C1P
CPGND
C1N
CPVSS
HPL A
CPVDD
C1P
CPGND
C1N
CPVSS
CL_H
VBIAS
INC1
VSS
HPR B
I.C.
I.C.
VBIAS
INC1
SDA
INC2
OUTRx C
OUT+
SDA
INC2
SCL
MAX9775
INB2
VDD D
PGND
SCL
MAX9776
INB2
SHDN
INA1
INA2
INB1
CR_L E
OUT-
SHDN
INA1
INA2
OUTR-
PGND
OUTR+
CR_H
GND F
PVDD
I.C.
PGND
I.C.
UCSP
UCSP
Chip Information
PROCESS: BiCMOS
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX9775/MAX9776
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
1
2
______________________________________________________________________________________
QFN THIN.EPS
35
2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier MAX9775/MAX9776
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
2
2
36
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2 x 1.5W, Stereo Class D Audio Subsystem with DirectDrive Headphone Amplifier
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
36L,UCSP.EPS
MAX9775/MAX9776
PACKAGE OUTLINE, 6x6 UCSP
21-0082
K
1
1
Revision History
Pages changed at Rev 1: 1, 7, 27, 28, 37
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 37
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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